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19-3539; Rev 0; 1/05
ILABLE N KIT AVA EVALUATIO
Dual Step-Down DC-DC Power-Management ICs for Portable Devices
General Description
The MAX8621Y/MAX8621Z power-management integrated circuits (PMICs) are designed for a variety of portable devices including cellular handsets. These PMICs include two high-efficiency step-down DC-DC converters, four low-dropout linear regulators (LDOs) with pin-programmable capability, one open-drain driver, a 60ms (typ) reset timer, and power-on/off control logic. These devices offer high efficiency with a no-load supply current of 160A, and their small thin QFN 4mm x 4mm package makes them ideal for portable devices. The step-down DC-DC converters utilize a proprietary 4MHz hysteretic-PWM control scheme that allows for ultra-small external components. Internal synchronous rectification improves efficiency and eliminates the external Schottky diode that is required in conventional step-down converters. The output voltage is adjustable from 0.6V to 3.3V. The output current is guaranteed up to 500mA. The four LDOs offer low 45VRMS output noise and low dropout of only 100mV at 100mA. OUT1 and OUT2 deliver 300mA (min) of continuous output current. OUT3 and OUT4 deliver 150mA (min) of continuous output current. The output voltages are pin selectable by SEL1 and SEL2 for flexibility. The MAX8621Y/ MAX8621Z offer different sets of LDO output voltages. A microprocessor reset output (RESET) monitors OUT1 and warns the system of impending power loss, allowing safe shutdown. RESET asserts during power-up, power-down, shutdown, and fault conditions where VOUT1 is below its regulation voltage. A 200mA driver output is provided to control LED backlighting or provide an open-drain connection for resistors such as in feedback networks.
Features
Two 500mA Step-Down Converters Up to 4MHz Switching Frequency Adjustable Output from 0.6V to 3.3V Four Low-Noise LDOs with Pin-Programmable Output Voltages One Open-Drain Driver 60ms (typ) Reset Timer Power-On/Off Control Logic and Sequencing 4mm x 4mm x 0.8mm 24-Pin Thin QFN
MAX8621Y/MAX8621Z
Ordering Information
PART MAX8621YETG MAX8621ZETG TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 24 Thin QFN 4mm x 4mm (T2444-4) 24 Thin QFN 4mm x 4mm (T2444-4)
Typical Operating Circuit
INPUT 2.6V TO 5.5V IN1 LX1 BUCK1 1.375V, 500mA
MAX8621Y MAX8621Z
IN2
FB1
IN3
PGND1 LX2 BUCK2 1.8V, 500mA
Applications
Cellular Handsets Smart Phones, PDAs Digital Cameras MP3 Players Wireless LAN
Pin Configuration appears at end of data sheet.
PWRON FB2 SEL1
SEL2
PGND2 OUT1 OUT1 2.6V, 300mA RESET OUT2 2.6V, 300mA OUT3 1.8V, 150mA OUT4 3V, 150mA INPUT GND DR
EN2 EN3
RESET OUT2
EN4 OUT3 ENDR REFBP OUT4
________________________________________________________________ Maxim Integrated Products
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
ABSOLUTE MAXIMUM RATINGS
PWRON, IN1, IN2, IN3, RESET, FB1, FB2, ENDR, REFBP, SEL1, SEL2 to GND..................-0.3V to +6.0V EN2, EN3, EN4, DR to GND.......................-0.3V to (VIN3 + 0.3V) OUT1, OUT2, OUT3, OUT4 to GND...........-0.3V to (VIN2 + 0.3V) PGND1, PGND2 to GND ......................................-0.3V to + 0.3V LX1, LX2 Current..........................................................1.5ARMS LX1, LX2 to GND (Note 1) ..........................-0.3V to (VIN1 + 0.3V) DR Current......................................................................0.5ARMS Continuous Power Dissipation (TA = +70C) 24-Pin 4mm x 4mm Thin QFN (derate 27.8mW/C above +70C) ..........................2222.2mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: LX_ has internal clamp diodes to GND and IN1. Applications that forward-bias these diodes should take care not to exceed the IC's package dissipation limits.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = 3.7V, CIN1 = 10F, CIN2 = CIN3 = 4.7F, COUT1 = COUT2 = 4.7F, COUT3 = COUT4 = 2.2F, CREFBP = 0.01F, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1, 2)
PARAMETER Input Supply Range Shutdown Supply Current No-Load Supply Current After startup VIN = 4.2V (Note 3) VIN = 3.7V; BUCK1, BUCK2, OUT1, OUT2 on; other circuits off VIN = 3.7V, BUCK1 and BUCK2 on, all LDOs on Light-Load Supply Current UNDERVOLTAGE LOCKOUT Undervoltage Lockout (Note 4) THERMAL SHUTDOWN Threshold Hysteresis REFERENCE Reference Bypass Output Voltage REF Supply Rejection LOGIC AND CONTROL INPUTS Input Low Level Input High Level Logic Input Current Tristate Low Input Threshold Tristate Low Input Threshold Hysteresis Tristate High Input Threshold PWRON, EN2, EN3, EN4; 2.6V VIN 5.5V PWRON, EN2, EN3, EN4; 2.6V VIN 4.2V PWRON, EN2, EN3, EN4; 2.6V VIN 5.5V EN3, EN4; 0V < VIN < 5.5V SEL_ SEL_ SEL_ VIN 1.2V -1 0.3 0.7 50 VIN 0.8V VIN 0.4V 1.44 1.12 1.25 +1 1.0 0.4 V V A V mV V TA = 0C to +85C 2.6V VIN 5.5V 1.235 1.250 0.2 1.265 V mV/V TA rising +160 15 C C VIN rising VIN falling 2.70 2.85 2.35 3.05 2.55 V VIN = 3.7V, BUCK1 and BUCK2 with 500A load each, OUT1 and OUT2 on, other circuits off CONDITIONS MIN 2.6 2 160 275 710 A TYP MAX 5.5 15 300 UNIT V A A
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3.7V, CIN1 = 10F, CIN2 = CIN3 = 4.7F, COUT1 = COUT2 = 4.7F, COUT3 = COUT4 = 2.2F, CREFBP = 0.01F, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1, 2)
PARAMETER Tristate High Input Threshold Hysteresis PWRON, EN2 Pulldown Resistor to GND STEP-DOWN DC-DC CONVERTER 1 (BUCK1) Supply Current Output Voltage Range FB1 Threshold Voltage FB1 Threshold Line Regulation FB1 Threshold Voltage Hysteresis (% of VFB1) FB1 Bias Current Current Limit On-Resistance Rectifier Off-Current Threshold Minimum On- and Off-Times Shutdown VFB1 = 0.5V p-MOSFET switch (ILIMP) n-MOSFET rectifier (ILIMN) p-MOSFET switch, ILX1 = -40mA n-MOSFET rectifier, ILX1 = 40mA ILXOFF tON tOFF ILOAD = 0A, no switching 0.6 VFB2 falling 2.6V VIN 5.5V ILOAD = 0A -2.5 1 Shutdown VFB = 0.5V p-MOSFET switch n-MOSFET rectifier p-MOSFET switch, ILX2 = -40mA n-MOSFET rectifier, ILX2 = 40mA ILXOFF tON tOFF 670 750 0.01 0.01 1000 1000 0.65 0.35 45 107 95 1500 1330 1.5 0.8 70 0.603 0.3 +2.5 670 750 VFB1 falling 2.6V VIN 5.5V ILOAD = 0A, no switching 0.6 0.603 0.3 1 0.01 0.01 1000 1000 0.65 0.35 45 107 95 40 3.3 1500 1330 1.5 0.8 70 40 3.3 A V V %/V % A mA mA ns SEL_ 400 CONDITIONS MIN TYP 50 800 1600 MAX UNIT mV k
MAX8621Y/MAX8621Z
STEP-DOWN DC-DC CONVERTER 2 (BUCK2) Supply Current Output Voltage Range FB2 Threshold Voltage FB2 Threshold Line Regulation FB2 Threshold Voltage Accuracy (Falling) (% of VFB2) FB2 Threshold Voltage Hysteresis (% of VFB2) FB2 Bias Current Current Limit On-Resistance Rectifier Off-Current Threshold Minimum On- and Off-Times A V V %/V % % A mA mA ns
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3.7V, CIN1 = 10F, CIN2 = CIN3 = 4.7F, COUT1 = COUT2 = 4.7F, COUT3 = COUT4 = 2.2F, CREFBP = 0.01F, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1, 2)
PARAMETER OUT1 (LDO1) Output Voltage Accuracy Output Current Current Limit Dropout Voltage Load Regulation Power-Supply Rejection VOUT1/VIN2 Output Noise Voltage (RMS) Output Capacitor for Stable Operation Ground Current OUT2 (LDO2) Output Voltage Accuracy Output Current Current Limit Dropout Voltage Load Regulation Power-Supply Rejection VOUT2/VIN2 Output Noise Voltage (RMS) Output Capacitor for Stable Operation Ground Current OUT3 (LDO3) Output Voltage Accuracy Output Current Current Limit Dropout Voltage Load Regulation VOUT3 = 0V ILOAD = 100mA , TA = +85C 1mA < ILOAD < 150mA, VSEL1 = VSEL2 = 0V 165 360 100 0.6 ILOAD = 1mA, 3.7V VIN_ 5.5V, relative to VOUT(NOM) TA = 0C to +85C TA = -40C to +85C -1.3 -2.3 0 150 650 210 mA mA mV % +0.3 +2.0 +2.5 % VOUT2 = 0V ILOAD = 200mA , TA = +85C 1mA < ILOAD < 300mA, VSEL1 = VSEL2 = 0V 10Hz to 10kHz, COUT2 = 4.7F, ILOAD = 30mA 100Hz to 100kHz, COUT2 = 4.7F, ILOAD = 30mA 0 < ILOAD < 300mA 0 < ILOAD < 150mA ILOAD = 500A 310 550 200 1.2 60 45 4.7 2.2 21 ILOAD = 1mA, 3.7V VIN_ 5.5V, relative to VOUT(NOM) TA = 0C to +85C TA = -40C to +85C -1.3 -2.3 0 300 940 420 mA mA mV % dB VRMS F A +0.6 +2.0 +2.5 % VOUT1 = 0V ILOAD = 200mA, TA = +85C VIN = greater of 3.7V or (VOUT(NOM) + 0.7V), 1mA < ILOAD < 300mA, VSEL1 = VSEL2 = 0V 10Hz to 10kHz, COUT1 = 4.7F, ILOAD = 30mA 100Hz to 100kHz, COUT1 = 4.7F, ILOAD = 30mA 0 < ILOAD < 300mA 0 < ILOAD < 150mA ILOAD = 500A 310 550 200 1.2 60 45 4.7 2.2 21 ILOAD = 1mA, 3.7V VIN 5.5V, relative to VOUT(NOM) TA = 0C to +85C TA = -40C to +85C -1.3 -2.3 0 300 940 420 mA mA mV % dB VRMS F A +0.6 +2.0 +2.5 % CONDITIONS MIN TYP MAX UNIT
ILOAD = 150mA, relative to VOUT(NOM)
ILOAD = 150mA, relative to VOUT(NOM)
ILOAD = 75mA, relative to VOUT(NOM)
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices
ELECTRICAL CHARACTERISTICS (continued)
(VIN = 3.7V, CIN1 = 10F, CIN2 = CIN3 = 4.7F, COUT1 = COUT2 = 4.7F, COUT3 = COUT4 = 2.2F, CREFBP = 0.01F, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Notes 1, 2)
PARAMETER Power-Supply Rejection VOUT3/VIN2 Output Noise Voltage (RMS) Output Capacitor for Stable Operation OUT4 (LDO4) ILOAD = 1mA, 3.7V VIN_ 5.5V, relative to VOUT(NOM) TA = 0C to VOUT(NOM) 1.8V +85C VOUT(NOM) = 1.5V TA = -40C to +85C -1.3 -1.30 -2.3 0 150 VOUT4 = 0V ILOAD = 100mA, TA = +85C 1mA < ILOAD < 150mA, VSEL1 = VSEL2 = 0 10Hz to 10kHz, COUT4 = 2.2F, ILOAD = 30mA 100Hz to 100kHz, COUT4 = 2.2F, ILOAD = 30mA 0 < ILOAD < 150mA 165 360 100 0.6 60 45 2.2 650 210 mA mA mV % dB VRMS F +0.3 +0.3 +2.0 +2.35 +2.5 % CONDITIONS 10Hz to 10kHz, COUT3 = 2.2F, ILOAD = 30mA 100Hz to 100kHz, COUT3 = 2.2F, ILOAD = 30mA 0 < ILOAD < 150mA MIN TYP 60 45 2.2 MAX UNIT dB VRMS F
MAX8621Y/MAX8621Z
Output Voltage Accuracy
ILOAD = 75mA, relative to VOUT(NOM) Output Current Current Limit Dropout Voltage Load Regulation Power-Supply Rejection VOUT4/VIN2 Output Noise Voltage (RMS) Output Capacitor for Stable Operation DRIVER (DR) ENDR Turn-On Threshold ENDR Input Current DR Output Low Voltage DR Off-Current (Leakage) RESET Output High Voltage Output Low Voltage RESET Threshold RESET Active Timeout Period Pullup Resistance to OUT1 ISINK = 1mA Percentage of nominal OUT1 rising when RESET falls From OUT1 87% until RESET = HIGH 8 84 VOUT1 - 0.3V IDR = 1mA VENDR = 0V and 5.5V IDR = 150mA, VENDR = 3.7V VDR = VIN = 5.5V, VENDR = 0V -1 -1
0.65 +1 0.2 0.4 +1
V A V A
V 0.3 87 60 14 20 90 V % ms k
Note 1: Note 2: Note 3: Note 4:
VIN1, VIN2, and VIN3 are shorted together and single input is referred to as VIN. All units are 100% production tested at TA = +85C. Limits over the operating range are guaranteed by design. OUT1, OUT2, OUT3, OUT4, LX1, and LX2 to ground. When the input voltage is greater than 2.85V (typ), the UVLO comparator trips and the threshold is reduced to 2.35V (typ). This allows the system to start normally until the input voltage decays to 2.35V.
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Typical Operating Characteristics
(Circuit of Figure 3, VIN1 = VIN2 = VIN3 = 3.6V, PWRON = IN, VBUCK1 = 1.375V, VBUCK2 = 1.8V, VOUT1 = 2.6V, VOUT2 = 2.6V, VOUT3 = 1.8V, VOUT4 = 3.0V, SEL1 = SEL2 = open, LX1 = LX2 = Murata LQH32CN2R2M53, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX8621 toc01
STARTUP WAVEFORMS
MAX8621 toc02
300 280 260 SUPPLY CURRENT (A) 240 220 200 180 160 140 120 100 2.5 3.0 3.5 4.0 4.5 5.0 NO LOAD BUCK1, BUCK2, OUT1, OUT2: ON
PWRON
5V/div 0 2V/div 0 2V/div 0 5V/div 0 5V/div 0 50s/div
BUCK1 BUCK2
OUT1 OUT2 5.5
INPUT VOLTAGE (V)
SHUTDOWN WAVEFORMS
MAX8621 toc03
RESET WAVEFORMS
MAX8621 toc04
PWRON
5V/div 0 2V/div 0 2V/div 0 5V/div 0 5V/div 0
PWRON
2V/div 0
BUCK1 BUCK2
OUT1 LOAD = 1mA
2V/div 0
OUT1 OUT2 10mA LOAD ON ALL FOUR OUTPUTS 100s/div
RESET
2V/div 0
20ms/div
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Typical Operating Characteristics (continued)
(Circuit of Figure 3, VIN1 = VIN2 = VIN3 = 3.6V, PWRON = IN, VBUCK1 = 1.375V, VBUCK2 = 1.8V, VOUT1 = 2.6V, VOUT2 = 2.6V, VOUT3 = 1.8V, VOUT4 = 3.0V, SEL1 = SEL2 = open, LX1 = LX2 = Murata LQH32CN2R2M53, TA = +25C, unless otherwise noted.)
OUT1 OUPUT VOLTAGE vs. INPUT VOLTAGE
LOAD = 0 2.625 OUTPUT VOLTAGE (V) 2.600 2.575 FALLING 2.550 RISING 2.525 2.500 2.5 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V) LOAD = 300mA
MAX8621 toc05
OUT2 OUTPUT VOLTAGE ACCURACY vs. LOAD CURRENT
1.5 1.0 0.5 0 -0.5 -1.0 -1.5 -2.0 0 50 100 150 200 250 300 LOAD CURRENT (mA)
MAX8621 toc06
2.650
2.0 OUTPUT VOLTAGE ACCURACY (%)
OUT4 DROPOUT VOLTAGE vs. LOAD CURRENT
MAX8621 toc07
OUT1 POWER-SUPPLY RIPPLE REJECTION vs. FREQUENCY
POWER-SUPPLY RIPPLE REJECTION (dB) 70 60 50 40 30 20 10 0 0.1 1 10 FREQUENCY (kHz) 100 1000
MAX8621 toc08
160 140 DROPOUT VOLTAGE (mV) 120 100 80 60 40 20 0 0 50 100
80
150
LOAD CURRENT (mA)
EFFICICENCY vs. LOAD CURRENT (VBUCK2 = 1.8V)
MAX8621 toc09
EFFICICENCY vs. LOAD CURRENT (VBUCK1 = 1.375V)
4.7H
MAX8621 toc10
100 90 EFFICIENCY (%) 80 70 60 50 40 0.1 1 10 100 BUCK1, OUT1, OUT2: ON WITH NO LOAD 2.2H 4.7H
100 90 EFFICIENCY (%) 80 1H 70 60 50 40 BUCK2, OUT1, OUT2: ON WITH NO LOAD 2.2H
1H
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Typical Operating Characteristics (continued)
(Circuit of Figure 3, VIN1 = VIN2 = VIN3 = 3.6V, PWRON = IN, VBUCK1 = 1.375V, VBUCK2 = 1.8V, VOUT1 = 2.6V, VOUT2 = 2.6V, VOUT3 = 1.8V, VOUT4 = 3.0V, SEL1 = SEL2 = open, LX1 = LX2 = Murata LQH32CN2R2M53, TA = +25C, unless otherwise noted.)
SWITCHING FREQUENCY vs. LOAD CURRENT
1H 2.2H FREQUENCY (MHz) LOAD = 50mA 4.7H 1 ILX1 200mA/div 0 VLX1 0.1 0 100 200 300 400 500 200ns/div LOAD CURRENT (mA) 5V/div 0
MAX8621 toc11
BUCK1 LIGHT-LOAD WAVEFORMS
MAX8621 toc12
10
VBUCK1
10mV/div AC-COUPLED
BUCK1 HEAVY-LOAD WAVEFORMS
MAX8621 toc13
BUCK1 LOAD-TRANSIENT RESPONSE
MAX8621 toc14
VBUCK1 LOAD = 300mA ILX1
10mV/div AC-COUPLED
VBUCK1
50mV/div AC-COUPLED 500mA/div 0 400mA LOAD
200mA/div 0
ILX1
VLX1
5V/div 0
IBUCK1
500mA/div 0
200ns/div
5s/div
BUCK1 OUTPUT VOLTAGE vs. LOAD CURRENT (VOLTAGE POSITIONING)
MAX8621 toc15
1.44 1.42 OUTPUT VOLTAGE (V) 1.40 1.38 1.36 1.34 1.32 1.30 0 100 200 300 400
500
LOAD CURRENT (mA)
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices
Pin Description
PIN 1 2 3 4 5 6 7 8 NAME FB1 FB2 GND REFBP EN4 OUT4 EN3 EN2 FUNCTION Voltage Feedback for Step-Down Converter 1. FB1 regulates to 0.6V nominal. Voltage Feedback for Step-Down Converter 2. FB2 regulates to 0.6V nominal. Ground. Ground for all LDOs and the control section. Reference Noise Bypass. Connect a 0.01F ceramic capacitor from REFBP to GND. Not intended to drive resistive load. REFBP is high impedance in shutdown. Enable Input for OUT4. Drive EN4 high to turn on OUT4. 150mA LDO4 output. Bypass OUT4 to GND with a 2.2F ceramic capacitor. OUT4 is high impedance when disabled. OUT4 can only be activated if OUT1 is within 87% of regulation. Enable Input for OUT3. Drive EN3 high to turn on OUT3. Enable Input for OUT2. Drive EN2 high to disable OUT2. Drive EN2 low or leave open to enable OUT2. EN2 is internally pulled to GND by an 800k (typ) pulldown resistor. If the MAX8621Y/MAX8621Z are placed into shutdown using PWRON (PWRON = low), OUT2 does not power regardless of the status of EN2. 300mA LDO2 Output. Bypass with a 4.7F ceramic capacitor to GND. OUT2 is high impedance when disabled. OUT2 can only be activated if OUT1 is within 87% of regulation. Supply Voltage to the Output MOSFET of All 4 LDOs. IN2 must be shorted to IN1 and IN3. Connect a 4.7F ceramic capacitor from IN2 to GND. Open-Drain, Active-Low Reset Output. RESET asserts low when VOUT1 drops below 87% (typ) of regulation. RESET deasserts 60ms after VOUT1 rises above 87% (typ) of regulation (Figure 2). 300mA LDO1 Output. Bypass with a 4.7F ceramic capacitor to GND. OUT1 is high impedance when disabled. 150mA LDO3 Output. Bypass OUT3 to GND with a 2.2F ceramic capacitor. OUT3 is high impedance when disabled. OUT3 can only be activated if OUT1 is within 87% of regulation. Power Enable Input. Drive PWRON high to enable the MAX8621Y/MAX8621Z. Drive PWRON low to enter shutdown mode. PWRON has an internal 800k (typ) pulldown resistor. Enable Input for DR. Drive ENDR low for DR to go into high impedance. Drive ENDR high to activate DR, pulling DR low. Supply Voltage to the Control Section. IN3 must be shorted to IN1 and IN2. Connect a 4.7F ceramic capacitor from IN3 to GND. LDO Output-Voltage Select Input 2. SEL1 and SEL2 set the OUT1, OUT2, OUT3, and OUT4 voltages to one of nine combinations (Table 1). LDO Output-Voltage Select Input 1. SEL1 and SEL2 set the OUT1, OUT2, OUT3, and OUT4 voltages to one of nine combinations (Table 1). 200mA Driver Output. Connects to the open drain of an internal n-channel MOSFET whose gate is controlled by ENDR. Inductor Connection for BUCK2. LX2 is internally connected to the drain of the internal p-channel MOSFET and the drain of the internal n-channel synchronous rectifier for BUCK2. LX2 is high impedance when BUCK2 is disabled. Supply Voltage to the Output Stage of BUCK1 and BUCK2. IN1 must be shorted to IN2 and IN3. Connect a 10F ceramic capacitor from IN1 to GND. Inductor Connection for BUCK1. LX1 is internally connected to the drain of the internal p-channel MOSFET and the drain of the internal n-channel synchronous rectifier for BUCK1. LX1 is high impedance when BUCK1 is disabled. Exposed Paddle. Connect the exposed paddle to GND, PGND1, and PGND2.
MAX8621Y/MAX8621Z
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 --
OUT2 IN2 RESET OUT1 OUT3 PWRON ENDR IN3 SEL2 SEL1 DR
PGND2 Power Ground for BUCK2 and DR Switch LX2 IN1 LX1
PGND1 Power Ground for BUCK1 EP
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Detailed Description
The MAX8621Y/MAX8621Z power-management ICs are designed specifically to power a variety of portable devices including cellular handsets. Each device contains two 4MHz high-efficient step-down converters, four low-dropout linear regulators (LDOs), a 60ms (typ) reset timer, a 200mA open-drain output driver, and poweron/off control logic (Figure 3). Transient Response graph in the Typical Operating Characteristics.
Low-Dropout Linear Regulators
Each MAX8621Y/MAX8621Z contains four low-dropout, low-quiescent-current, high-accuracy linear regulators (LDOs). OUT1 and OUT2 supply loads up to 300mA, while OUT3 and OUT4 supply loads up to 150mA. The LDO output voltages are set using SEL1 and SEL2 (see Table 1). The LDOs include an internal reference, error amplifier, p-channel pass transistor, internal programmable voltage-divider, and an OUT1 power-good comparator. Each error amplifier compares the reference voltage to a feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the pass-transistor gate is pulled lower, allowing more current to pass to the outputs and increasing the output voltage. If the feedback voltage is too high, the pass-transistor gate is pulled up, allowing less current to pass to the output.
Step Down DC-DC Control Scheme
The MAX8621Y/MAX8621Z step-down converters are optimized for high-efficiency voltage conversion over a wide load range, while maintaining excellent transient response, minimizing external component size, and minimizing output voltage ripple. The DC-DC converters (BUCK1 and BUCK2) also feature an optimized onresistance internal MOSFET switch and synchronous rectifier to maximize efficiency. The MAX8621Y/ MAX8621Z utilize a proprietary hysteretic-PWM control scheme that switches with nearly fixed frequency up to 4MHz, allowing for ultra-small external components. The step-down converter output current is guaranteed up to 500mA, while consuming 40A (typ). When the step-down converter output voltage falls below the regulation threshold, the error comparator begins a switching cycle by turning the high-side p-channel MOSFET switch on. This switch remains on until the minimum on-time (tON) expires and the output voltage is in regulation or the current-limit threshold (ILIMP) is exceeded. Once off, the high-side switch remains off until the minimum off-time (tOFF) expires and the output voltage again falls below the regulation threshold. During this off period, the low-side synchronous rectifier turns on and remains on until either the high-side switch turns on or the inductor current reduces to the rectifier-off current threshold (ILXOFF = 45mA (typ)). The internal synchronous rectifier eliminates the need for an external Schottky diode.
DR Driver
Each MAX8621Y/MAX8621Z includes a 1.3 n-channel MOSFET open-drain output that is controlled by ENDR. This output can be used to drive LEDs (see the Typical Operating Circuit) and allow adjustable output voltages (see Figure 1).
Programming LDO Output Voltages (SEL1, SEL2)
As shown in Table 1, the LDO output voltages, OUT1, OUT2, OUT3, and OUT4 are pin-programmable by the logic states of SEL1 and SEL2. SEL1 and SEL2 are trilevel inputs: IN, open, and GND. The input voltage, VIN, must be greater than the selected OUT1, OUT2, OUT3, and OUT4 voltages. The logic states of SEL1 and SEL2 can be programmed only during power-up. Once the OUT_ voltages are programmed, their values do not change by changing SEL_ unless the MAX8621Y/MAX8621Z power is cycled.
L1 2.2H LX1 R1 150k
Voltage-Positioning Load Regulation
The MAX8621Y/MAX8621Z use a unique step-down converter feedback network. By taking feedback from the LX node through R1, the usual phase lag due to the output capacitor is removed, making the loop exceedingly stable and allowing the use of a very small ceramic output capacitor. This configuration causes the output voltage to shift by the inductor series resistance multiplied by the load current. This output voltage shift is known as voltage-positioning load regulation. Voltagepositioning load regulation greatly reduces overshoot during load transients, which effectively halves the peak-to-peak output-voltage excursions compared to traditional step-down converters. See the Buck1 Load10
BUCK1 1.38V OR 1.8V
MAX8621Y MAX8621Z FB1
1.38/1.8 ENDR DR
C6 150pF
R5 215k
R2 115k
Figure 1. Adjusting BUCK1 Output Voltage Using DR
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Table 1. SEL1 and SEL2, MAX8621Y/MAX8621Z Output Voltage Selection
SEL1 IN IN IN OPEN OPEN OPEN GND GND GND SEL2 IN OPEN GND IN OPEN GND IN OPEN GND MAX8621Y OUT1 (V) 3.3 3.0 2.5 2.85 3.3 3.3 3.3 2.85 3.3 OUT2 (V) 3.3 3.3 3.3 3.3 3.3 3.3 2.85 2.85 2.85 OUT3 (V) 2.85 3.3 2.85 3.0 2.8 3.0 3.3 3.3 3.0 OUT4 (V) 2.85 2.85 3.0 2.5 3.0 3.0 2.85 3.3 3.0 OUT1 (V) 2.8 2.6 2.6 2.6 2.6 2.6 2.9 3.0 3.0 MAX8621Z OUT2 (V) 2.6 2.6 2.6 2.6 2.6 2.6 3.1 2.9 2.5 OUT3 (V) 3.0 3.0 2.9 3.0 1.8 2.8 1.8 2.9 2.9 OUT4 (V) 3.0 3.0 2.9 3.3 3.0 3.0 1.5 2.9 2.9
Power-Supply Sequence
BUCK1 is always first on and last off in the MAX8621Y/ MAX8621Zs' power sequence. BUCK1 turns on approximately 40s after PWRON is enabled. BUCK2 turns on approximately 40s after BUCK1, and OUT1 turns on 65s after BUCK2. These delays have been added to sequence the turn-on of the step-down converters and LDOs so that the initial current surges are distributed
over time. For the same reason, OUT2, OUT3, and OUT4 can be turned on by EN2, EN3, and EN4 signals, but only after OUT1 has reached 87% of its final value. Note that OUT2 typically requires a longer time to enable than OUT3 and OUT4 (45s versus 15s). All regulators can be turned off at the same time when PWRON is low, but BUCK1 remains on for approximately another 120s after PWRON goes low.
PWRON REF 40s 40s BUCK2 65s 87% REGULATION OUT1 87% REGULATION 60ms 120s
BUCK1
RESET
OUT2
45s
EN3 (EN4) 15s OUT3 (OUT4)
EN2
Figure 2. Power-On/Off Sequence Diagram ______________________________________________________________________________________ 11
Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
PWRON
Drive PWRON low or leave PWRON open to place the MAX8621Y/MAX8621Z in power-down mode and reduce supply current to 5A (typ). In power-down, the control circuitry, internal-switching p-channel MOSFET, and the internal synchronous rectifier (n-channel MOSFET) turn off (BUCK1 and BUCK2), and LX_ becomes high impedance. In addition, all four LDOs are disabled. Connect PWRON to IN or logic-high to enable the MAX8621Y/MAX8621Z. EN2 enables and disables OUT2 when PWRON is high.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipation in the MAX8621Y/MAX8621Z. Independent thermalprotection circuits monitor the step-down converters and the linear-regulator circuits. When the junction temperature exceeds TJ = +160C, the thermal-overload protection circuit disables the corresponding circuitry, allowing the IC to cool. The LDO thermal-overload protection circuit enables the LDOs after the LDO junction temperature cools down, resulting in pulsed LDO outputs during continuous thermal-overload conditions. The step-down converter's thermal-overload protection circuitry enables the step-down converter after the junction temperature cools down. Thermal-overload protection safeguards the MAX8621Y/MAX8621Z in the event of fault conditions. For continuous operation, do not exceed the absolute maximum junction-temperature rating of TJ = +150C.
OUT2 Enable (EN2)
Drive EN2 high to disable OUT2. Drive EN2 low or leave open to enable OUT2. EN2 is internally pulled to GND by an 800k (typ) pulldown resistor. If the MAX8621Y/MAX8621Z are powered down using PWRON (PWRON = low), OUT2 does not power regardless of the status of EN2.
Reset Output (RESET)
The reset circuit is active both at power-up and powerdown. RESET asserts low when VOUT1 drops below 87% (typ) of regulation. RESET deasserts 60ms after VOUT1 rises above 87% (typ) of regulation. RESET is pulled up through an internal 14k resistor to OUT1.
Applications Information
Step-Down DC-DC Converter
Setting the Step-Down Output Voltage Select an output voltage for BUCK1 between 0.6V and 3.3V by connecting FB1 to a resistive voltage-divider between LX1 and GND. Choose R2 (Figure 3) for a reasonable bias current in the resistive divider. A wide range of resistor values is acceptable, but a good starting point is to choose R2 as 100k. Then, R1 (Figure 3) is given by: V R1 = R2 OUT - 1 VFB where VFB = 0.6V. For BUCK2, R3 and R4 are calculated using the same methods. Input Capacitor The input capacitor, CIN1, reduces the current peaks drawn from the battery or input power source and reduces switching noise in the IC. The impedance of CIN1 at the switching frequency should be kept very low. Ceramic capacitors with X5R or X7R dielectrics are highly recommended due to their small size, low ESR, and small temperature coefficients. Due to the MAX8621Y/MAX8621Z step-down converter's fast softstart, the input capacitance can be very low. Use a 10F ceramic capacitor or an equivalent amount of multiple capacitors in parallel between IN1 and ground. Connect CIN1 as close to the IC as possible to minimize the impact of PC board trace inductance. Use a 4.7F ceramic capacitor from IN2 to ground and a second 4.7F ceramic capacitor from IN3 to ground.
Undervoltage Lockout
Initial power-up of the MAX8621Y/MAX8621Z occurs when V IN is greater than 2.85V (typ) and PWRON asserts. Once VIN exceeds 2.85V (typ), the undervoltage lockout has 0.5V of hysteresis, allowing the VIN operating range to drop down to 2.35V (typ) without shutting down.
Current Limiting
The MAX8621Y/MAX8621Z OUT1 and OUT2 LDOs limit their output current to 550mA (typ). OUT3 and OUT4 LDOs limit their output current to 360mA (typ). If the LDO output current exceeds the current limit, the corresponding LDO output voltage drops. The step-down converters (BUCK1 and BUCK2) limit the p-channel MOSFET to 670mA (min) and the n-channel MOSFET to 750mA (min).
Reference Bypass Capacitor Node (REFBP)
An external 0.01F bypass capacitor and an internal 100k (typ) resistor at REFBP create a lowpass filter for LDO noise reduction. OUT1, OUT2, OUT3, and OUT4 exhibit 45VRMS of output voltage noise with CREFBP = 0.01F, COUT1 = COUT2 = 4.7F, and COUT3 = COUT4 = 2.2F.
12
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices
Inductor Selection The MAX8621Y/MAX8621Z step-down converters operate with inductors between 1H and 4.7H. Low-inductance values are physically smaller but require faster switching, resulting in some efficiency loss. See the Typical Operating Characteristics for efficiency and switching frequency vs. inductor value plots. The inductor's DC current rating needs to be only 100mA greater than the application's maximum load current because the step-down converter features zero-current overshoot during startup and load transients. For output voltages above 2.0V, when light-load efficiency is important, the minimum recommended inductor is 2.2H. For optimum voltage-positioning load transients, choose an inductor with DC series resistance in the 50m to 150m range. For higher efficiency at heavy loads (above 200mA) or minimal load regulation (but some transient overshoot), the resistance should be kept below 100m. For light-load applications up to 200mA, much higher resistance is acceptable with very little impact on performance. See Table 2 for some suggested inductors.
MAX8621Y/MAX8621Z
Table 2. Suggested Inductors
MANUFACTURER SERIES CB2012 LB2012 INDUCTANCE (H) 2.2 4.7 1.0 2.2 1.0 1.5 2.2 3.3 1.0 1.5 2.2 3.3 1.0 1.5 2.2 3.3 4.7 1.0 2.2 4.7 2.2 4.7 1.5 2.2 3.3 1.5 2.2 2.7 3.3 1.5 2.2 3.3 4.7 ESR () 0.23 0.40 0.15 0.23 0.09 0.11 0.13 0.20 0.06 0.07 0.09 0.11 0.08 0.11 0.13 0.16 0.20 0.06 0.10 0.15 0.10 0.17 0.13 0.17 0.19 0.10 0.12 0.15 0.17 0.05 0.08 0.10 0.14 CURRENT RATING (mA) 410 300 300 240 455 350 315 280 500 400 340 270 775 660 600 500 430 1000 790 650 400 300 1230 1080 1010 1290 1140 980 900 900 780 600 500 DIMENSIONS 2.0 x 1.25 x 1.25 = 3.1mm3 2.0 x 1.25 x 1.25 = 3.1mm3 2.0 x 1.6 x 1.8 = 5.8mm3
LB2016 Taiyo Yuden LB2518
2.5 x 1.8 x 2.0 = 9mm3
LBC2518
2.5 x 1.8 x 2.0 = 9mm3
LQH32C_53 Murata LQM43FN
3.2 x 2.5 x 1.7 = 14mm3 4.5 x 3.2 x 0.9 = 13mm3 3.6 x 3.6 x 1.0 = 13mm3
D310F TOKO D312C
3.6 x 3.6 x 1.2 = 16mm3
Sumida
CDRH2D11
3.2 x 3.2 x 1.2 = 12mm3
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13
Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Output Capacitor The output capacitors, C7 and C9 in Figure 3, are required to keep the output voltage ripple small and to ensure regulation loop stability. C7 and C9 must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectric are highly recommended due to their small size, low ESR, and small temperature coefficients. Due to the unique feedback network, the output capacitance can be very low. For most applications, a 2.2F capacitor is sufficient. For optimum load-transient performance and very low output ripple, the output capacitor value in F should be equal or larger than the inductor value in H. Feed-Forward Capacitor The feed-forward capacitors, CFF (C6 and C8 in Figure 3), set the feedback loop response, control the switching frequency, and are critical in obtaining the best efficiency possible. Choose a small ceramic X7R capacitor with value given by: L1 C6 = x 10Siemens R1 Select the closest standard value to CFF as possible. For BUCK2, C8, R3, and L1 are calculated using the same methods.
Thermal Considerations
The MAX8621Y/MAX8621Z total power dissipation, PD, is estimated using the following equations: PD = PLOSS(BUCK1) + PLOSS(BUCK 2) + PLOSS(OUT1) + PLOSS(OUT2) + PLOSS(OUT3) + PLOSS(OUT4) PLOSS(BUCK1) = PIN(BUCK1) x 1 - / 100
(
)
2 - IBUCK1 x RDC(INDUCTOR)
PLOSS(BUCK 2) = PIN(BUCK 2) x 1 - / 100
- IBUCK 2
(
)
2
PLOSS(OUT1) = IOUT1 x VIN - VOUT1
( PLOSS(OUT3) = IOUT3 x ( VIN PLOSS(OUT4) = IOUT4 x ( VIN
(
x RDC(INDUCTOR)
PLOSS(OUT2) = IOUT2 x VIN - VOUT2
- -
) VOUT3 ) VOUT4 )
)
LDO Output Capacitor and Regulator Stability
Connect a 4.7F ceramic capacitor between OUT1 and ground, and a second 4.7F ceramic capacitor between OUT2 and ground for 300mA applications. For 150mA applications, 2.2F ceramic capacitors can be used for OUT1 and OUT2. Connect a 2.2F ceramic capacitor between OUT3 and ground, and a second 2.2F ceramic capacitor between OUT4 and ground. The LDO output capacitor's (COUT) equivalent series resistance (ESR) affects stability and output noise. Use output capacitors with an ESR of 0.1 or less to ensure stability and optimum transient response. Surfacemount ceramic capacitors have very low ESR and are commonly available in values up to 10F. Connect COUT_ as close to the IC as possible to minimize the impact of PC board trace inductance.
where PIN(BUCK1) is the input power for BUCK1, is the step-down converter efficiency, and RDC(INDUCTOR) is the inductor's DC resistance. For example, operating with VIN = 3.7V, VBUCK1 = 1.376V, VBUCK2 = 1.8V, VOUT1 = VOUT2 = 2.6V, VOUT3 = 1.8V, VOUT4 = 3V, IBUCK1 = IBUCK2 = 300mA, IOUT1 = IOUT2 = 330mA, IOUT3 = IOUT4 = 100mA, PIN(BUCK1) = 516mW and = 80%, PIN(BUCK2) = 651mW and = 83%: PLOSS(OUT1) = PLOSS(OUT2) = 363mW PLOSS(OUT3) = 190mW PLOSS(OUT4) = 70mW PLOSS(BUCK1) = 94mW PLOSS(BUCK 2) = 102mW PD = 363mW + 363mW + 190mW + 70mW + 94mW + 102mW = 1182mW
14
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Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
INPUT 2.6V TO 5.5V C3 4.7F IN3 IN2 INP OUT1 C5 4.7F 14k LDO1 EN REFBP C4 0.01F GND REF RESET DR N STEP-DOWN DC-DC (1, BUCK1) LX N EN PGND FB INP P REF LDO3 REF EN EN GND 9-BIT SEL EN3 OUT OUT4 C12 2.2F OUT INP IN REF LDO2 IN INP OUT2 C10 4.7F PGND FB STEP-DOWN DC-DC (2, BUCK2) LX N LX2 R3 150k PGND2 FB2 R4 75k INPUT 2.6V TO 5.5V L1 2.2H C6 150pF C1 10F BUCK1 C7 2.2F 9-BIT SEL GND RESET C2 4.7F
UVLO
IN REF
OUT
1.3, 200mA
IN
INP P
IN1
LX1 R1 150k PGND1 FB1
ENDR
PGND2
REF
IN1 R2 115k L2 2.2H BUCK2 C8 150pF C9 2.2F
IN OUT3 C11 2.2F OUT INP IN
EN LDO4 REF 9-BIT SEL GND EN2
EN GND 9-BIT SEL 800k EN4 VOLTAGE SELECTOR 800k ON/OFF CONTROL
SEL1 SEL2
PWRON
THERMAL SHUTDOWN
MAX8621Y MAX8621Z
Figure 3. Functional Diagram and Typical Application Schematic ______________________________________________________________________________________ 15
Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
The die junction temperature can be calculated as follows: TJ = TA + PD x JA When operating at an ambient temp of +70C under the above conditions: C TJ = 70C + 1.182W 36 = 112.6C W TJ should not exceed +150C in normal operating conditions. Connect GND and PGND_ to the ground plane. The external feedback network should be very close to the FB pin, within 0.2in (5mm). Keep noisy traces, such as the LX node, as short as possible. Connect GND to the exposed paddle directly under the IC. Refer to the MAX8621Y/MAX8621Z evaluation kit for an example PC board layout and routing.
Chip Information
TRANSISTOR COUNT: 5850 PROCESS: BiCMOS
Printed Circuit Board Layout and Routing
High switching frequencies and relatively large peak currents make the PC board layout a very important aspect of design. Good design minimizes excessive EMI on the feedback paths and voltage gradients in the ground plane, both of which can result in instability or regulation errors. Connect CIN_ close to IN_ and GND. Connect the inductor and output capacitors (COUT_) as close to the IC as possible and keep the traces short, direct, and wide. The traces between COUT_, CFF_, and FB_ are sensitive to inductor magnetic field interference. Route these traces between ground planes or keep the traces away from the inductors.
Pin Configuration
ENDR OUT3 13 12 OUT1 11 RESET 10 IN2 TOP VIEW PWRON 14
SEL1
SEL2 17
18 DR 19 PGND2 20 LX2 21 IN1 22 LX1 23 PGND1 24 1 FB1
16
IN3
15
MAX8621Y MAX8621Z
9 8 7
OUT2 EN2 EN3
2 FB2
3 GND
4 REFBP
5 EN4
6 OUT4
16
______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs for Portable Devices
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 24L QFN THIN.EPS
MAX8621Y/MAX8621Z
PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.8mm
21-0139
C
1
2
______________________________________________________________________________________
17
Dual Step-Down DC-DC Power-Management ICs for Portable Devices MAX8621Y/MAX8621Z
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.8mm
21-0139
C
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.

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